Computer chips are designed and optimized for use on either a single chip module or a multi-chip module but the optimization characteristics of each chip are different for use on each type of module. The optimization of the particular computer chip is accomplished by properly balancing the requirements for the computer chip with each requirement for either the single or multiple chip module. The choice as to the optimization is dictated to a large extent by the characteristics and requirements of the module to be used with the chip output driver. The specific consideration being addressed by this invention is the relative signal strength delivered from the chip drivers. Since the on-chip driver is designed for the particular module or card environment in which it is to be used, the driver is fixed and the driver characteristics are determined at the time of design and manufacture of the processor chip.
As optimized for use on a single chip module the chip driver provides a much stronger drive signal than the drive signal which would emanate from a processor chip optimized for use on a multi-chip module. If a chip that is optimized for single chip module use is used on a multi-chip module, its signal strength is sufficient to overdrive the transmission line leading to the receiver, but this will cause undesirable signal reflections at the receiver and the driver. The reflection at the driver end of the transmission line will return again to the receiver and appear as a false signal. Reflections will continue traveling back and forth until the signal amplitude dissipates. Signal reflections and overdriving are undesirable characteristics which, of necessity, must be addressed during the design phase.
Because a chip mounted on a single chip module is optimized for its module and for further interconnection of that module to other modules over significant distances, the signal strength is matched to the transmission line and associated circuitry and no special circuit modifications are necessary since the processor chip is tailored or designed for that specific implementation.
Whenever the circuit designer makes the choice as to which chip driver design is to be used, that chip is optimized for a specific environment thereby becoming the standard chip. The decision is primarily driven by economics. The quantity of chips which are used in each module environment is significantly different and the design parameters of the chips vary depending on the module design. Single chip module usage is much more common; and accordingly, with other factors being generally equal, the economics suggest the single chip module optimized chip is best selected for both uses. Secondarily, the strength of the driver signals for a single chip module optimized chip is easier to work with and modify when implemented on a multiple chip module than the modification of the signal strength for a multiple chip module chip when implemented on a single chip module.
Accordingly, other factors being generally equal, the economics of manufacturing and the manufacturing efficiencies associated with higher volumes tend to dictate that the processor chip optimized for a single chip module be selected for use on a multiple chip module, and additionally that the multiple chip module thereby be designed to accept and satisfactorily operate with the selected processor chip. The incremental cost of designing the multi-chip module to accept single module chips is relatively small because the interconnection circuits internal to the module must be designed for whatever computer chip is selected and only optimization of selected connections in the module is affected.
Once such a selection between the two chips is made, the support circuitry of the multi-chip module must be designed to accommodate the slightly less than optimal chip parameters selected for use therewith.
As a computer chip optimized for use with single chip modules is selected for use with multiple chip modules one of the problems to be addressed is that the driver signal of the selected chip will overdrive the circuit and produce significant signal overshoot and undershoot, thereby resulting in unreliable signals and generating unwanted and undesired reflections of the signals from unterminated networks. These undesirable characteristics may be satisfactorily addressed by connecting termination resistors at appropriate points in the circuit, most typically in series with the conductor and the driver to create a near end termination; nevertheless, other connection points for the termination resistors are known and may be considered for termination purposes.
Because end termination resistors typically would be resident at the driving or receiving chip, extreme surface congestion can occur near the chip. The available space for surface mount resistors is extremely limited in the chip mount region due to the large number of interconnections near the chips. Accordingly, the positioning of termination resistors between the contact pad on the multi-chip module and the contact of the driven processor chip becomes impractical from a space and volume requirements standpoint.
Whenever the need for such resistors is considered, if there is a need for several of the connections involving termination resistors, the space surrounding the chip is insufficient to support the wiring of the resistors. In order to accommodate the resistors, the size of the multi-chip modules would have to be significantly expanded; this expansion and corresponding displacement of the processor chips away from each other, to afford space needed for and to accommodate the termination resistors, defeats some of the advantages of the multi-chip module, close proximity placement for the various processor chips attached thereto.
In disposing the computer chips over a larger surface area on a multiple chip module, the efficiencies and speed acquired by the use of the multi-chip module are partially offset or defeated; and accordingly, any advantage of the multi-chip module over several single chip modules would be no longer significant if present at all.
One embodiment of multi-chip modules involves the use of multi-layered ceramic (MLC) technology. This invention will be described with reference to this technology, although the extension to other embodiments i.e., laminated boards, is within the skill of the art.
In MLC technology, a given circuit configuration is implemented as a set of conductors screened onto an insulating substrate layer. The conductors on each layer may be interconnected to conductors on other layers through the use of vias (holes created in layers and filled with conductive materials).
The processing sequence for MLC manufacturing is:
1) create a pre-ceramic sheet of material which, when sintered or fired will become solid ceramic. The pre-ceramic sheet is referred to as a "green sheet" and it is flexible and easy to process, i.e., punch hole into it and screen material onto the sheet. PA1 2) punch holes into the green sheet where interlayer connections will be required. PA1 3) screen conductor containing paste onto the green sheet to form the conductive paths desired. At the same time, or separately, if desired, fill the punched holes with the paste material; PA1 4) stack the appropriate green sheet layers (with their respective conductive patterns) and laminate them. This forces the conductive paste filled vias and layers to co-mingle forming continuous paths between layers. PA1 5) sinter the laminated green sheets at an appropriately high temperature, causing the green sheets to form a solid ceramic structure and at the same time resulting in the conductive material containing paste forming continuous low resistance conductors.
It is possible to control the resulting resistivity of the conductors by controlling the nature of the paste being screened. Moreover, by including ceramic material in the conductive paste itself, the resistance of the resulting conductors can be altered dramatically.
It is this ability of controlling the resistance of the conductors that will be used in this invention.
Another embodiment of a multi-chip module utilizes thin-film technologies. Thin-film connections are selected to reduce the size of inter chip conductors. The resistance of a particular conductor is determined by a combination of factors, including the bulk resistivity of a material used in the thin-film conductor, the thickness of the thin-film conductor, the width of the thin-film conductor, and/or the length of the thin-film conductor. All of these factors can have an established influence on the resistance of any conductive path which may be designed for interconnecting two or more processor chips on a single substrate or module.
The conductors in the multi-chip module may be of sufficient length, lay sufficiently close enough to other conductors, and carry signals that have voltage rise and fall times that are fast enough to act as transmission lines with the well known concomitant problems associated with transmission lines, particularly signal reflections and termination requirements. Therefore, those circuits having portions acting as transmission lines which require termination in order to prevent reflected signals must have termination components incorporated therein.
Contributing to the transmission line emulation is the high speed signal transmission or the very rapid signal rise and fall times necessary for high speed signals. The signals being sent and/or received by the various chips on a multiple chip module are of extremely short duration; accordingly, the faster the rise time of a signal, the shorter a line has to be in order to mimic a transmission line. Because of the short acquisition windows, termination of a circuit in the characteristic impedance of the line is dictated in order to provide a stable, reliable signal and suppression of signal reflections.